ATSAMV71Q20B-CB More Semiconductors - ICs by Microchip Technology
| Status: | Active |
|---|---|
| Series: | ATSAMV71Q20 |
| RoHS: | Compliant |
The Microchip SAM V71 devices are a family of Automotive Flash microcontrollers based on the high-performance 32-bit ARM Cortex-M7 processor with a Double Precision Floating Point Unit (FPU). These devices operate at up to 300MHz and feature up to 2048 Kbytes of Flash, and up to 384 Kbytes of multi-port SRAM which is configurable Instruction and Data Tightly Couple Memories to leverage the advanced DSP capabilities of the core.
The SAM V71 series includes a 10/100 Ethernet MAC w/IEEE1588, HS USB Interface with integrated PHY, dual CAN-FD, QSPI, MediaLB, CMOS Imager interface, TDM/I2S (SSC,) multiple serial interfaces as well as on-board hardware cryptography including a TRNG, AES-256, and SHA-256 engines.
Supported by MPLAB X IDE and MPLAB Harmony.
Features
| ARM® Cortex®-M7 running up to 300MHz |
| 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC) |
| Single- and double-precision HW Floating Point Unit (FPU) |
| Memory Protection Unit (MPU) with 16 zones |
| DSP Instructions, Thumb®-2 Instruction Set |
| Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU) |
| 1024 Kbytes embedded Flash with unique identifier and user signature for user-defined data |
| 384 Kbytes embedded Multi-port SRAM |
| Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes) |
| 16 Kbytes ROM with embedded Bootloader routines (UART0, USB) and IAP routines |
| 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling |
| Embedded voltage regulator for single-supply operation |
| Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation |
| Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock |
| RTC with Gregorian calendar mode, waveform generation in low-power modes |
| RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations |
| 32-bit low-power Real-time Timer (RTT) |
| High-precision Main RC oscillator with 12 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed. |
| 32.768 kHz crystal oscillator or Slow RC oscillator as source of low-power mode device clock (SLCK) |
| One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations |
| Temperature Sensor |
| One dual-port 24-channel central DMA Controller (XDMAC) |
| Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 µA in Backup mode with RTC, RTT and wakeup logic enabled |
| Ultra-low-power RTC and RTT |
| 1 Kbyte of backup RAM (BRAM) with dedicated regulator |
| One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP frames and 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Timestamping and IEEE802.1Qav credit-based traffic-shaping hardware support |
| USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional endpoints, dedicated DMA |
| 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI) |
| Two Host Controller Area Networks (MCAN) with Flexible Data Rate (CAN-FD) with SRAM-based mailboxes, time- and event-triggered transmission |
| MediaLB® device with 3-wire mode, up to 1024 x Fs speed, supporting MOST25 and MOST50 networks |
| Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode. |
| Five 2-wire UARTs with SleepWalking™ support |
| Three Two-Wire Interfaces (TWIHS) (I2C-compatible) with SleepWalking™ support |
| Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and on-the-fly scrambling |
| Two Serial Peripheral Interfaces (SPI) |
| One Serial Synchronous Controller (SSC) with I2S and TDM support |
| Two Inter-IC Sound Controllers (I2SC) |
| One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC) |
| Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor |
| Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control. |
| Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 1.7 Msps. Offset and gain error correction feature. |
| One 2-channel 12-bit 1 Msps-per-channel Digital-to-Analog Controller (DAC) with Differential and Over Sampling modes |
| One Analog Comparator Controller (ACC) with flexible input selection, selectable input hysteresis |
| True Random Number Generator (TRNG) |
| AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications |
| Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256. |
| Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination |
| Five Parallel Input/output Controllers (PIO) |
| Single supply voltage from 3.0V to 3.6V |
| Qualification AEC-Q100 grade 2 ([-40°C : +105°C] ambient temperature) |
| LQFP144, 144-lead LQFP, 20 x 20 mm, pitch 0.5 mm |
| TFBGA144, 144-ball TFBGA, 10 x 10 mm, pitch 0.8 mm |
Specifications
| Part Family | SAMV71 |
|---|---|
| CPU Type | Cortex-M7 |
| MaxSpeed (MHz) | 300 |
| Program Memory Size (KB) | 1024 |
| SRAM (KB) | 384 |
| Data EEPROM (bytes) | 0 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 105 |
| Operation Voltage Min.(V) | 1.7 |
| Operation Voltage Max.(V) | 3.6 |
| Direct Memory Access (DMA) Channels | 24 |
| SPI™ | 5 |
| I2C | 3 |
| UART | 8 |
| I2S | 3 |
| QSPI | 1 |
| Ethernet | Ethernet AVB |
| SDIO/SD-CARD/eMMC | 1 |
| Quadrature Encoder Interface (QEI) | 4 |
| Hardware Touch Peripheral | None |
| Crypto Engine | Yes |
| Number of USB Modules | 1 |
| USB Interface | High Speed |
| Number of CAN Modules | 2 |
| Type of CAN module | CAN-FD |
| ADC Channels | 24 |
| Max ADC Resolution (bits) | 12 |
| Max ADC Sampling Rate (ksps) | 1700 |
| Number of DACs | 1 |
| Input Capture | 24 |
| Standalone Output Compare/ Standard PWM | 24 |
| Motor Control PWM Channels | 16 |
| Max 16 Bit Digital Timers | 12 |
| Number of Comparators | 1 |
| Internal Oscillator | 4,8,12Mhz, 32Khz |
| Hardware RTCC | Yes |
| Max I/O Pins | 114 |
| Pin Count | 144 |
| Low Power | No |
| Pins | Packaging | 144 | TFBGA |
| Temp Range | -40C to +105C |
| Packing Media | Tray (240) |
Last 6 months Inventory & Pricing History
Resources
Data Sheets |
|---|
| SAM E70/S70/V70/V71 Family Data Sheet |
Brochures |
|---|
| 32-bit Microcontroller Families Brochure |
| 32-bit Peripherals Quick Reference Card |
| SAM Automotive Sell Sheet |
Design Checklist |
|---|
| Basic 32-Bit MCU Design and Troubleshooting Checklist |
Environmental Information
| JEDEC Indicator | e8 |
|---|---|
| ROHS | Compliant |
| China EFUP | Compliant |
| Device Weight (g) | 0.1812 |
| Shipping Weight (kg) | 0.783333 |
| Lead Count | 144 |
| Package Type | TFBGA |
| Package Width or Size | 10x10x1.2mm |
| Soldering Composition | SAC105 |
Alternative Descriptions
| Automotive Cortex-M7 Ethernet AVB | Microchip Technology |
| Mcu, 32Bit, 300Mhz, Tfbga-144 | Newark Electronics |
| IC: ARM microcontroller | TME |
| MCU, 32BIT, 300MHZ, TFBGA-144 | Farnell |
| TFBGA-144/A°/FLASH, 384KB SRAM | Avnet Silica |
Frequently Asked Questions
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