DSPIC33FJ06GS102A-I/TL dsPIC33FJ06GS102A by Microchip Technology
16 Bit DSC, 6KB Flash, 0.25KB RAM, 40 MHz, 36 Pin, SMPS PWM
| Status: | Unknown |
|---|---|
| Series: | - |
| RoHS: | Unknown |
Features
CPU |
| Up to 40 MIPS Operation (at 3.0-3.6V) |
| 16 x 16 Fractional/Integer Hardware Multiply, Single Cycle Execution |
| Single-Cycle Multiply and Accumulate |
| 32-bit by 16-bit Hardware Divider |
C Compiler Optimized Instruction SetSystem |
| Internal oscillator and Phase-Locked Loop (PLL) with 120 MHz VCO |
| On-chip LDO Voltage Regulator |
| JTAG Boundary Scan and Flash Memory Program Support |
| Fail-Safe Clock Monitor u2013 allows safe shutdown if clock fails |
Watchdog Timer with separate RC oscillatorHigh-Speed PWM Module Features |
| Two pairs of PWM outputs |
| Dead Time for Rising and Falling Edges |
| Duty Cycle Resolution of 1.04 ns for Dead-Time, Phase Shift, and Frequency |
| Supported PWM modes: Standard Edge-Aligned, True Independent Output, Complementary, Center-Aligned, Push-Pull, Multi-Phase, Variable Phase, Fixed Off-Time, Current Reset, and Current-Limit |
| PWMxL, PWMxH Output Pin Swapping |
| PWM4H, PWM4L Pins Remappable |
On-the-Fly PWM Frequency, Duty Cycle and Phase Shift ChangesHigh-Speed ADC |
| 10-Bit Resolution |
| 6 Input Channels |
| 2 Msps Conversion rate |
Independent Trigger Source Section for each Analog Input Conversion PairPeripherals |
| UART Module with LIN and IrDAu00ae support |
| SPI Module with FIFO |
| I2Cu2122 Module with Master and Slave Modes |
| 2 16-bit Timer Modules |
| 1 Output Compare / PWM |
Specifications
| Family | 16-Bit DSC |
|---|---|
| Part Family | dsPIC33FJ09GS302 |
| Part Prefix | dsPIC |
| Architecture | 16 |
| Core | 16-bit dsPIC DSC |
| MaxSpeed (MHz) | 40 |
| CPU Type | 16-bit dsPIC DSC |
| CPU Speed (MIPS/DMIPS) | 40 |
| Program Memory Type | Flash |
| SelfWrite | Yes |
| Program Memory Size (KB) | 6 |
| Program Memory Size (KWords) | 2 |
| Secure Bootloader (CodeGuard™ Security) | Basic |
| RAM (bytes) | 256 |
| Emulated EEPROM in Flash | True |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 125 |
| Operation Voltage Min.(V) | 3 |
| Operation Voltage Max.(V) | 3.6 |
| Max I/O Pins | 21 |
| Pin Count | 28 |
| Brown Out Reset (BOR) | BOR |
| Low Voltage Detection (LVD) | None |
| Power On Reset (POR) | Yes |
| Internal Voltage Reference (Bandgap) | Yes |
| Internal Oscillator | 7.37 MHz, 32.768 kHz |
| Number of ADCs | 1 |
| ADC Channels | 6 |
| Max ADC Sampling Rate (ksps) | 2000 |
| Max ADC Resolution (bits) | 10 |
| Max ADC Sample/Hold (S/H) | 1 |
| UART | 1 |
| SPI™ | 1 |
| I2C | 1 |
| Max 16 Bit Digital Timers | 2 |
| Watch Dog Timers (WDT) | Yes |
| Timers | 2 |
| Motor Control PWM Channels | 4 |
| SMPS PWM Channels | 4 |
| Standalone Output Compare/ Standard PWM | 1 |
| Max # PWM outputs (including complementary outputs) | 5 |
| Number of PWM Time Bases | 2 |
| PWM Max Resolution (bits) | 16 |
| PWM Resolution (time ns) | 1 |
| USB Interface | None |
| Type of CAN module | None |
| LIN | Yes |
| IrDA | Yes |
| Ethernet | None |
| Integrated Wireless Frequency | None |
| Wireless Technology | None |
| Peripheral Pin Select (PPS)/Pin Muxing | Yes |
| Parallel Port | GPIO |
| JTAG | Program/Boundary Scan |
| Debug Interface | ICSP |
| Include in Focus Product Selector Guide | True |
| InstructionWord | 24 |
| Temperature Range | -40C to +85C |
Last 6 months Inventory & Pricing History
Alternative Descriptions
| 40 MIPS, 6 KB FLASH, 256 BYTES RAM, SMPS PERIPHERALS | RS Americas |
| IC, DSC, 16BIT, 6KB, 36VTLA | Farnell |
Frequently Asked Questions
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Additional datasheets, footprints and schematics for DSPIC33FJ06GS102A-I/TL are listed on our Part Details page. You can also find images and similar parts to DSPIC33FJ06GS102A-I/TL on this page.
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The DSPIC33FJ06GS102A-I/TL is listed under dsPIC33FJ06GS102A.
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This part has not been flagged as RoHS Compliant.
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