DSPIC33FJ32GP202-I/MM Digital Signal Controllers - DSC by Microchip Technology

Status: Active
Series: dsPIC33FJ32GP202
RoHS: Compliant
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 â€¢dsPIC33Fs are designed to execute digital filter algorithms and high-speed precision digital control loops, ideal for applications that need to perform under pressure           â€¢General Purpose Digital Signal Controllers (DSCs) with advanced analog and seamless migration options to PIC24F, PIC24H MCUs and dsPIC30F DSCs 

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Features

Operating Range
Up to 40 MIPS operation (at 3.0-3.6V)
3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS
3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS
High-Performance dsPIC33FJ core
Modified Harvard architecture
C compiler optimized instruction set
24-bit wide instructions, 16-bit wide data path
Linear program memory addressing up to 4M instruction words
Linear data memory addressing up to 64 Kbytes
Two 40-bit accumulators with rounding and saturation options
Indirect, Modulo and Bit-reversed addressing modes
16 x 16 fractional/integer multiply operations
32/16 and 16/16 divide operations
Single-cycle multiply and accumulate (MAC) with accumulator write back and dual data fetch
Single-cycle MUL plus hardware divide
Up to ±16-bit shifts for up to 40-bit data
On-chip Flash and SRAM
Direct Memory Access (DMA)
8-channel hardare DMA
Up to 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA
Most peripherals support DMA
Timers/Capture/Compare/PWM
Up to five 16-bit and up to two 32-bit Timers/Counters
One timer runs as a Real-Time Clock with an external 32.768 kHz oscillator
Input Capture (up to four channels) with Capture on up, down or both edges
16-bit capture input functions
4-deep FIFO on each capture
Output Compare (up to four channels) with Single or Dual 16-bit Compare mode and 16-bit Glitchless PWM mode
Hardware Real-Time Clock/Calendar (RTCC)
Interrupt Controller
5-cycle latency
118 interrupt vectors
Up to 49 available interrupt sources
Up to three external interrups
Seven programmable priority levels
Five processor exceptions
Digital I/O
Peripheral pin Select functionality
Up to 35 programmable digital I/O pins
Wake-up/Interrupt-on-Change for up to 21 pins
Output pins can drive from 3.0V to 3.6V
Up to 5V output with open drain configuration
All digital input pins are 5V tolerant
4 mA sink on all I/O pins
System Management
Flexible clock options: External, crystal, resonator and internal RC
Fully integrated Phase-Locked Loop (PLL)
Extremely low jitter PLL
Power-up Timer
Oscillator Start-up Timer/Stabilizer
Watchdog Timer with its own RC oscillator
Fail-Safe Clock Monitor
Reset by multiple sources
Power Management
On-chip 2.5V voltage regulator
Switch between clock sources in real time
Idle, Sleep, and Doze modes with fast wake-up
Analog-to-Digital Converters (ADCs)
10-bit, 11 Msps or 12-bit, 500 Ksps conversion:
Two and four simultaneous samples (10-bit ADC)
Up to 13 input channels with auto-scanning
Conversion start can be manual or synchronized with one of four trigger sources
Conversion possible in Sleep mode
±2 LSb max integral nonlinearity
±1 LSb max differential nonlinearity
Other Analog Peripherals
Two analog comparators with programmable input/output configuration
4-bit DAC with two ranges for analog comparators
16-bit dual channel 100 Ksps audio DAC
Data Converter Interface (DCI) module
Codec interface
Supports I2S and AC.97 protocols
Up to 16-bit data words, up to 16 words per frame
4-word deep TX and RX buffers
Communication Modules
4-wire SPI (up to two modules) with I/O interface to simple codecs
I2Câ„¢ with Full Multi-Master Slave mode support, slave address masking, 7-bit and 10-bit addressing, integrated signal conditioning and bus collision detection
UART (up to two modules) with LIN bus support, IrDA® and hardware flow control with CTS and RTS
Parallel Master Slave Port (PMP/EPSP)
Programmable Cyclic Redundancy Check (CRC)
Debugger Development Support
In-circuit and in-application programming
Two program breakpoints
Trace and run-time watch

Specifications

Architecture 16
MaxSpeed (MHz) 40
CPU Speed (MIPS/DMIPS) 40
Program Memory Size (KB) 32
Multiple Flash Panels False
Temp. Range Min. -40
Temp. Range Max. 125
Operation Voltage Min.(V) 3
Operation Voltage Max.(V) 3.6
Pin Count 28
Low Power No
Number of Comparators 0
Number of ADCs 1
ADC Channels 10
Max ADC Resolution (bits) 12
Max ADC Sampling Rate (ksps) 1100
Number of DACs 0
DAC outputs 0
Max DAC Resolution (bits) 0
Hardware RTCC No
Motor Control PWM Channels 0
SMPS PWM Channels 0
Number of PWM Time Bases 1
Output Compare Channels 4
USB Interface None
Number of CAN Modules 0
Type of CAN module None
Crypto Engine No
Quadrature Encoder Interface (QEI) 0
Segment LCD 0
LCD/Graphics Interface No
Configurable Logic Cell Modules (CLC /CCL) 0
Peripheral Pin Select (PPS)/Pin Muxing Yes
Pins | Packaging 28 | QFN-S
Temp Range -40C to +85C
Packing Media Tube (61)

Last 6 months Inventory & Pricing History


Resources



Application Notes
AN699 - Anti-Aliasing, Analog Filters for Data Acquisition Systems
AN1044 - Data Encryption Routines for PIC24 and dsPIC Devices
AN1069 - Using C30 Compiler and the SPI module to Interface EEPROMs with dsPIC33F and PIC24F
AN1079 - Using the C30 Compiler and the I2C? Peripheral to Interface Serial EEPROMs with dsPIC33F
AN1096 - Using the C30 Compiler to Interface SPI Serial EEPROMs with dsPIC33
AN1100 - Using the C30 Compiler to Interface Serial EEPROMs with dsPIC33F
AN1045 - File I/O Functions Using Microchip's
AN1115 - Implementing Digital Lock-In Amplifiers Using the dsPIC DSC
AN1152 - Achieving Higher ADC Resolution Using Oversampling
AN1210 - Using External Memory with PIC24F/24H/dsPIC33F Devices
AN1236 - Using C30 and a Timer to Interface dsPIC33 DSCs and PIC24 MCUs with UNI/O(R) Bus-Compatible Serial EEPROMs



Code Examples
CE100 - Using A/D Converters and DSP Library for Signal Filtering
CE101 - Configuring 10-bit A/D Converters for 1MSPS Conversion Rate
CE102 - Performing A/D Conversions in SLEEP (Low-Power) Mode
CE103 - Implementing DOZE Mode for Dynamic CPU Power Control
CE104 - Dynamic Clock Switching for Low Power Operation
CE105 - Address Error Traps for Easy Debugging
CE106 - Math Error Traps for Robust Operation
CE107 - Stack Error Traps for Easy Debugging
CE108 - Oscillator Failure Traps and Failsafe Clock Monitoring
CE109 - Run-Time Self Programming of FLASH Program Memory
CE110 - Dynamic Tuning of Internal Fast RC
CE111 - External Interrupt Pins Configuration and Use
CE112 - Fast Wake-up From Sleep Mode
CE113 - Timer1 used in Real-Time Clock Applications
CE114 - Using the DMA with the UART in Loopback mode
CE115 - Example of Handling a DMA Trap
CE116 - Using the DMA with the SPI module
CE117 - Using the DMA with DCI peripheral for I2S driver
CE118 - Using FIR Filters From dsPIC Filter Design and DSP Library
CE119 Interfacing to I2C Serial EEPROM using I2C peripheral
CE120 A/D Conversions with Scanning through selected Analog Inputs with DMA
CE121 A/D Conversions with Scanning through selected Analog Inputs without DMA
CE122 - ADC Alternate Sampling
CE123 - CodeGuard(TM) Security: segment creation and code placement
CE124 - CodeGuard(TM) Security: Program flow changes between segments
CE125 - CodeGuard(TM) Security: Secure Segment Erase
CE127 - Crosswire Communication between ECAN 1 and ECAN 2 modules
CE128 - ECAN FIFO Receive Example
CE129 - ECAN Remote Transmission Request
CE135 - SPI Demo
CE136 - SPI without DMA
CE137 - UART without DMA
CE138 - SPI with two slaves
CE139 - 10-bit ADC Sampling at 2.2MSPS
CE140 - Inverse tangent operation using CORDIC iterative approximation
CE141 - SPI with Framed mode
CE142 - Open Drain configuration
CE132 - Si3000 Driver
CE143 - Using Timer1 for Period Interrupts
CE144 - CodeGuard Application Example
CE145 - Using I2C module as a Slave device
CE146 - Adaptive Notch Filter
CE147 - Signal Matching using Coherence Function Cross Spectral Density
CE148 - ADC Sampling with DMA and FIR Filtering - Apps include Circuit Breakers
CE149 - Signal generation, fractional sampling rate, interpolation, decimation
CE150 - JPEG Entropy Coding
CE151 - CRC Generation
CE153 - RTCC
CE154 - ADC to DAC Loopback
CE152 - Parallel Master Port (PMP) Example
CE155 - Real-Time Data Monitoring (RTDM) Example




Reference Manuals
Section 02. CPU - dsPIC33F FRM
Section 03. Data Memory - dsPIC33F/PIC24H FRM
Section 04. Program Memory - dsPIC33F/PIC24H FRM
Section 05. Flash Programming - dsPIC33F/PIC24H FRM
Section 06. Interrupts - dsPIC33F/PIC24H FRM
Section 07. Oscillator - dsPIC33F/PIC24H FRM
Section 08. Reset - dsPIC33F FRM
Section 09. Watchdog Timer and Power-Saving Modes - dsPIC33F/PIC24H FRM
Section 10. I/O Ports - dsPIC33F/PIC24H FRM
Section 11. Timers - dsPIC33F/PIC24H FRM
Section 12. Input Capture - dsPIC33F FRM
Section 16. Analog-to-Digital Converter (ADC) - dsPIC33F/PIC24H FRM
Section 23. CodeGuard Security - dsPIC33F/PIC24H FRM
Section 24. Programming and Diagnostics - dsPIC33F/PIC24H FRM
Section 25. Device Configuration - dsPIC33F/PIC24H FRM
Section 26. Development Tool Support - dsPIC33F FRM
Section 27. Introduction (Part II) - dsPIC33F FRM
Section 30. I/O Ports with Peripheral Pin Select (PPS) - dsPIC33F/PIC24H FRM
dsPIC33/PIC24 FRM, UART
dsPIC33/PIC24 FRM, I2C
dsPIC33/PIC24 FRM, Output Compare
dsPIC33/PIC24 FRM, Serial Peripheral Interface (SPI)



Environmental Information

JEDEC Indicator e3
ROHS Compliant
China EFUP Compliant
Device Weight (g) 0.1016
Shipping Weight (kg) 0.163934
Lead Count 28
Package Type QFN-S
Package Width or Size 6x6x0.9mm
Soldering Composition Matte Tin

Alternative Descriptions

28-PIN, 32KB, FLASH, 2048BYTES-RAM, 40MIPS, 21I/O, 16-BIT FAMILY | Microchip Technology
Ic, Dsc, 16Bit, 32Kb, 40Mhz, 3.6V Qfn-28 | Newark Electronics
dsPIC33F Series 2 kB RAM 32 kB Flash 16-Bit Digital Signal Controller - QFN-S28 | Future Electronics
IC: dsPIC microcontroller | TME
16-BIT DSC, 28LD,32KB FLASH,40 MIPS, NANOWATT | RS Americas
DSC, 16BIT, 32K FLASH, 40MIPS, 28QFN-S | element14


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The DSPIC33FJ32GP202-I/MM is listed under Semiconductors - ICs > Digital Signal Controllers - DSC.

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Yes. This part has been flagged as RoHS Compliant by Microchip Technology.

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