MC100EP40DTR2G Clock Generation by ON Semiconductor

Phase-Frequency Detector, 3.3 V / 5 V, ECL Differential

Semiconductors - ICs
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Status: Active
Series: MC100EP40
RoHS: Compliant
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The MC100EP40 is a three-state phase-frequency detector intended for phase-locked loop applications which require a minimum amount of phase and frequency difference at lock. Advanced design significantly reduces the dead zone of the detector. For proper operation, the input edge rate of the R and V inputs should be less than 5 ns. The device is designed to work with a 3.3 V / 5 V power supply. When Reference (R) and Feedback (FB) inputs are unequal in frequency and/or phase the differential UP (U) and DOWN (D) outputs will provide pulse streams which when subtracted and integrated provide an error voltage for control of a VCO. When Reference (R) and Feedback (FB) inputs are 80 pS or less in phase difference, the Phase Lock Detect pin will indicate lock by a high state. The VTX (VTR, VTRbar , VTFB , VTFBbar ) pins offer an internal termination network for 50 line impedance environment shown in Figure 2. An external sinking supply of VCC-2 V is required on VTX pin(s). If you short the two differential VTR and VTR (or VTFB and VTFBbar ) together, you provide a 100 termination resistance that is compatible with LVDS signal receiver termination. For more information on termination of logic devices, see AND8020. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinkingto 0.5 mA. When not used, VBB should be left open. For more information on Phase Lock Loop operation, refer to AND8040. Special considerations are required for differential inputs under No Signal conditio

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Features

Maximum Frequency > 2 Ghz Typical
Fully Differential
Advanced High Band Output Swing of 400 mV
Theoretical Gain = 1.11
Trise 97 pS Typical, Ffall 70 pS Typical
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
50Ω Internal Termination Resistor
These are Pb-Free Devices

Specifications

Description MC100EP40
Compliance Pb-free Halide free
Input Level CML ECL
Output Level ECL
VCC Typ (V) 3.3 5
Transfer Gain Typ (mV/degree) 0.93
CMRR Max (V) 2
fToggle Max (MHz) 2000
tpd Typ (ns) 0.55
tJitter Typ (ps) 0.2
tR & tF Max (ps) 150
Package Type TSSOP-20

Last 6 months Inventory & Pricing History

Alternative Descriptions

Phase Frequency Detector, Tssop-20 | Newark Electronics
100EP Series 2 GHz 5.5 V ECL Differential Phase-Frequency Detector-TSSOP-20 | Future Electronics
IC: detector | TME
PHASE FREQUENCY DETECTOR, TSSOP-20 | Farnell

Frequently Asked Questions

Where can I find additional details, specifications and documents for a MC100EP40DTR2G?

Additional datasheets, footprints and schematics for MC100EP40DTR2G are listed on our Part Details page. You can also find images and similar parts to MC100EP40DTR2G on this page.

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What category does MC100EP40DTR2G fall under?

The MC100EP40DTR2G is listed under Timing, Logic & Memory > Clock Generation > Phase / Frequency Detectors.

Can I view similar or alternative parts?

You can view similar parts to MC100EP40DTR2G when available in the Phase / Frequency Detectors range under the specifications section at the bottom of the details page.

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Is the MC100EP40DTR2G RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by ON Semiconductor.

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