MC10E431FNG Clock & Data Distribution by ON Semiconductor

ECL 3-Bit Differential Flip-Flop

Semiconductors - ICs
> Logic
> Flip Flops
Status: Active
Series: MC10E431
RoHS: Compliant
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The MC10E/100E431 is a 3-bit flip-flop with differential clock, data input and data output. The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the flip-flop and then continue clocking at the next clock edge, without the necessity of de-asserting the set/reset signal (as would be the case with a level controlled set/reset). The E431 is also designed with larger internal swings, an approach intended to minimize the time spent crossing the threshold region and thus reduce the metastability susceptibility window. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the Dbar and the CLKbar sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. Note that the input clamps only operate when both inputs fall to 2.5 V below VCC. The 100 Series contains temperature compensation. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

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Features

Edge-Triggered Asynchronous Set and Reset
Differential D, CLK and Q; VBB Reference Available
1100MHz Min. Toggle Frequency
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
Internal Input Pulldown Resistors
ESD Protection: > 1 kV HBM, > 75 V MM
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D
Flammability Rating: UL-94 code V-0 @ 1/8",Oxygen Index 28 to 34
Transistor Count = 348 devices
Pb-Free Packages are Available

Specifications

Description MC10E431
Compliance Pb-free Halide free
Type D-Type
Bits 3
Input Level CML ECL
Output Level ECL
VCC Typ (V) 5
tJitter Typ (ps) 1
tpd Typ (ns) 0.7
tsu Min (ns) 0.2
th Min (ns) 0.2
trec Typ (ns) 0.4
tR & tF Max (ps) 700
fToggle Typ (MHz) 1100
Package Type PLCC-28

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Frequently Asked Questions

Where can I find additional details, specifications and documents for a MC10E431FNG?

Additional datasheets, footprints and schematics for MC10E431FNG are listed on our Part Details page. You can also find images and similar parts to MC10E431FNG on this page.

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What category does MC10E431FNG fall under?

The MC10E431FNG is listed under Timing, Logic & Memory > Clock & Data Distribution > Flip-Flops, Latches & Registers.

Can I view similar or alternative parts?

You can view similar parts to MC10E431FNG when available in the Flip-Flops, Latches & Registers range under the specifications section at the bottom of the details page.

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Is the MC10E431FNG RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by ON Semiconductor.

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