PIC32MZ2048EFM124-I/TL PIC32MZ2048EFM124 by Microchip Technology
32 Bit MCU, FPU, 2MB Flash, 512KB RAM, 200MHz, 124Pin, USB-HS, ENET, CAN, Crypto
| Status: | Unknown |
|---|---|
| Series: | - |
| RoHS: | Unknown |
Features
| Key Features |
| 200 MHz/330 DMIPS, MIPS Warrior M-class core |
| DSP-enhanced core: |
| Four 64-bit accumulators |
| Single-cycle MAC, saturating and fractional math |
| IEEE 754-compliant |
| Dual Panel Flash for live update support |
| FPU for fast single- and double-precision math |
| 12-bit, 18 MSPS, 48-channel ADC module |
| Memory Management Unit for optimum embedded OS execution |
| microMIPS mode for up to 35% code compression |
| CAN, UART, I2C, PMP, EBI, SQI & Analog Comparators |
| SPI/I2S interfaces for audio processing and playback |
| Hi-Speed USB 2.0 Device/Host/OTG |
| 10/100 Mbps Ethernet MAC with MII and RMII interface |
| Crypto Engine with a RNG for data encryption/decryption and authentication (AES, 3DES, SHA, MD5, and HMAC) |
| Temperature Range: - 40°C to 85°C; - 40°C to 125°C |
| AEC-Q100 Qualified |
| Grade 1 |
| - 40°C to 125°C Microcontroller Features |
| Operating voltage range of 2.2V to 3.6V |
| 2MB Flash memory (plus an additional 160 KB of Boot Flash) |
| 512KB SRAM memory |
| microMIPS mode for up to 35% smaller code size |
| DSP-enhanced core: |
| Four 64-bit accumulators |
| Single-cylce MAC, saturating and fractional math |
| IEEE 754-compliant |
| FPU for fast single- and double-precision math |
| Code-efficient (C and Assembly) architecture |
| Low-power management modes (Idle and Sleep) Peripheral Features |
| 50 MHz External Bus Interface (EBI) |
| 50 MHz Serial Quad Interface (SQI) |
| Peripheral Pin Select (PPS) functionality to enable function remap |
| 8 channels of hardware programmable DMA and 18 channels of dedicated DMA with automatic data size detection |
| Six UART modules (25 Mbps): Supports LIN 1.2 and IrDA protocols |
| Two CAN modules 2.0B Active with DeviceNet addressing support |
| Six 4-wire SPI modules (50 Mbps) |
| SQI configurable as an additional SPI module (50 MHz) |
| Five I2C modules (up to 1 Mbaud) with SMBus support |
| Parallel Master Port (PMP) |
| Hardware Real-Time Clock and Calendar (RTCC) |
| Nine 16-bit Timers/Counters (four 16-bit pairs combine to create four 32-bit timers) |
| Nine Capture inputs and Nine Compare/PWM outputs Audio/Graphics/Touch HMI Features |
| Graphics interface: EBI or PMP |
| Audio data communication: I2S, LJ, RJ, USB |
| Audio data control interface: SPI and I2C™ |
| Audio data master clock: Fractional clock frequencies with USB synchronization Advanced Analog Features |
| 12-bit ADC Module: |
| 18 Msps rate with six Sample and Hold (S&H) circuits (five dedicated and one shared) |
| Up to 48 analog inputs |
| Can operate during sleep and idle modes |
| Multiple trigger sources |
| Six digital comparators and six digital filters |
| Two analog comparators with 32 programmable voltage references |
| Temperature sensor with ±2°C accuracy Debugger Development Support |
| In-circuit and in-application programming |
| 4-wire MIPS® Enhanced JTAG interface |
| Unlimited program and 12 complex data breakpoints |
| IEEE 1149.2-compatible (JTAG) boundary scan |
| Non-intrusive hardware-based instruction trace Integrated Software Libraries and Tools |
| MPLAB Harmony - PIC32 software development framework |
| C/C++ compiler with native DSP/fractional and FPU support |
| TCP/IP, USB, Graphics and mTouch middleware |
| MFi, Android and Bluetooth audio frameworks |
| RTOS Kernels, Express Logic ThreadX, FreeRTOS, OPENRTOS, Micriµm, µC/OS and SEGGER embOS |
Specifications
| Family | 32-bit MCU |
|---|---|
| Part Family | PIC32MZEF |
| Part Prefix | PIC32MZ |
| Architecture | 32 |
| Core | 32-bit MIPS |
| MaxSpeed (MHz) | 200 |
| CPU Type | 32-bit MIPS MCU |
| CPU Speed (MIPS/DMIPS) | 330 |
| FPU | Yes |
| Program Memory Type | Flash |
| SelfWrite | Yes |
| Program Memory Size (KB) | 2048 |
| Program Memory Size (KWords) | 512 |
| Auxiliary Flash (KB) | 160 |
| Multiple Flash Panels | True |
| Secure Bootloader (CodeGuard™ Security) | None |
| RAM (bytes) | 524288 |
| Emulated EEPROM in Flash | True |
| Direct Memory Access (DMA) Channels | 8 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 125 |
| Operation Voltage Min.(V) | 2.2 |
| Operation Voltage Max.(V) | 3.6 |
| Max I/O Pins | 98 |
| Pin Count | 124 |
| Brown Out Reset (BOR) | BOR |
| Low Voltage Detection (LVD) | LVD |
| Power On Reset (POR) | Yes |
| Internal Voltage Reference (Bandgap) | Yes |
| Internal Oscillator | 8 MHz, 32 kHz |
| Number of Comparators | 2 |
| Number of ADCs | 6 |
| ADC Channels | 48 |
| Diff ADC Inputs | 48 |
| Max ADC Sampling Rate (ksps) | 18000 |
| Max ADC Resolution (bits) | 12 |
| Max ADC Sample/Hold (S/H) | 1 |
| CODEC Interface (I2S, AC97) | Yes |
| UART | 6 |
| SPI™ | 6 |
| I2C | 5 |
| I2S | 6 |
| QSPI | 1 |
| Max 16 Bit Digital Timers | 9 |
| Max 32 Bit Digital Timers | 4 |
| Hardware RTCC | Yes |
| Watch Dog Timers (WDT) | Yes |
| Timers | 9 |
| Standalone Output Compare/ Standard PWM | 9 |
| Input Capture | 9 |
| PWM Max Resolution (bits) | 32 |
| Output Compare Channels | 9 |
| Number of USB Modules | 1 |
| USB Interface | None |
| Number of CAN Modules | 2 |
| Type of CAN module | CAN |
| CAN Transmit Buffers | 32 |
| CAN Receive Buffers | 32 |
| LIN | Yes |
| IrDA | Yes |
| Ethernet | 10/100 Base-TX Mac |
| Number of Ethernet Ports | 1 |
| Integrated Wireless Frequency | None |
| Wireless Technology | None |
| Class B Hardware | True |
| CRC | Yes |
| Peripheral Pin Select (PPS)/Pin Muxing | Yes |
| Parallel Port | PMP |
| Crypto Engine | Yes |
| JTAG | Debug/Program/Boundary Scan |
| Debug Interface | ICSP |
| Keydifferences | FPU |
| Include in Focus Product Selector Guide | True |
| SQI | True |
| Temperature Range | -40C to +85C |
Alternative Descriptions
| MCU 32bit, Flash 2048KB, RAM 512KB, A/D48x12b, -40+85°C | ECOM |
| MCU, 32BIT, PIC32, 200MHZ, VTLA-124 | Farnell |
Frequently Asked Questions
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The PIC32MZ2048EFM124-I/TL is listed under PIC32MZ2048EFM124.
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This part has not been flagged as RoHS Compliant.
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