SPC58EG80E5FEC0X SPC5 32-bit Automotive MCUs by STMicroelectronics

32-bit Power Architecture MCU for Automotive General Purpose Applications - Chorus family

Status: Active
Series: SPC58EG80E5
RoHS: Compliant
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Prices starting from US$17.31

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Features

AEC-Q100 qualified
High performance e200z4 triple core: 32-bit Power Architecture technology CPU Core frequency as high as 180 MHz Variable Length Encoding (VLE) Floating Point, End-to-End Error Correction
32-bit Power Architecture technology CPU
Core frequency as high as 180 MHz
Variable Length Encoding (VLE)
Floating Point, End-to-End Error Correction
6582 KB (6144 KB code flash+ 256 KB data flash) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation Supports read while read between the two code Flash partitions.
supports read during program and erase operations, and multiple blocks allowing EEPROM emulation
Supports read while read between the two code Flash partitions.
608 KB on-chip general-purpose SRAM (in addition to 160 KB core local data RAM): 64KB in CPU_0, 64 KB in CPU_1 and 32 KB in CPU_2
182 KB HSM dedicated flash memory (144 KB code + 32 KB data)
Multi-channel direct memory access controller (eDMA) one eDMA with 64 channels one eDMA with 32 channels
one eDMA with 64 channels
one eDMA with 32 channels
1 interrupt controller (INTC)
Comprehensive new generation ASIL-D safety concept: ASIL-D of ISO 26262 One CPU channel in lockstep Logic BIST FCCU for collection and reaction to failure notifications Memory BIST Cyclic redundancy check (CRC) unit Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
ASIL-D of ISO 26262
One CPU channel in lockstep
Logic BIST
FCCU for collection and reaction to failure notifications
Memory BIST
Cyclic redundancy check (CRC) unit
Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters with end-to-end ECC
Body cross triggering unit (BCTU) Triggers ADC conversions from any eMIOS channel Triggers ADC conversions from up to 2 dedicated PIT_RTIs
Triggers ADC conversions from any eMIOS channel
Triggers ADC conversions from up to 2 dedicated PIT_RTIs
Enhanced modular IO subsystem (eMIOS): up to 64 timed IO channels with 16-bit counter resolution
Enhanced analog-to-digital converter system with: 4 independent fast 12-bit SAR analog converters One supervisor 12-bit SAR analog converter One standby 10-bit SAR analog converter
4 independent fast 12-bit SAR analog converters
One supervisor 12-bit SAR analog converter
One standby 10-bit SAR analog converter
Communication interfaces: 18 LINFlexD modules 10 deserial serial peripheral interface (DSPI) modules 8 MCAN interfaces with advanced shared memory scheme and ISO CAN-FD support Dual-channel FlexRay controller Two independent Ethernet controllers 10/100Mbps compliant IEEE 802.3-2008
18 LINFlexD modules
10 deserial serial peripheral interface (DSPI) modules
8 MCAN interfaces with advanced shared memory scheme and ISO CAN-FD support
Dual-channel FlexRay controller
Two independent Ethernet controllers 10/100Mbps compliant IEEE 802.3-2008
Low power capabilities Versatile low power modes Ultra low power standby with RTC Smart Wake-up Unit for contact monitoring Fast wakeup schemes
Versatile low power modes
Ultra low power standby with RTC
Smart Wake-up Unit for contact monitoring
Fast wakeup schemes
Dual phase-locked loops with stable clock domain for peripherals and FM modulation domain for computational shell
Nexus development interface (NDI) per IEEEISTO 5001-2003 standard, with some support for 2010 standard
Boot assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART
Junction temperature range -40 °C to 150 °C

Last 6 months Inventory & Pricing History


Resources



Technical Notes & Articles
TN1391 Configuration of XOSC integrated load capacitances in SPC58 device lines
TN1363 DSPI: relationship between protocol and register interface clocks
TN1239 How to change DCF STCU configuration
TN1366 How to reduce the effect of the injected current on SAR ADC
TN1296 I2S emulation on DSPI
TN1396 RTC/API setup for wake-up in SPC58 family
TN1406 SPC58 family - OPC pads management
TN1289 SPC58 line - How to use the Memory Protection Layers
TN1264 SPC584Gx, SPC58EGx, SPC58NGx IO definition: signal description and input multiplexing tables
TN1332 SPC58x Ethernet FIFO access and IMA error injection
TN1343 SPC58x Ethernet filtering compatibility
TN1344 SPC58x Power Down / Up test cycling
TN1346 SPC58x configuring CAN and CAN-FD bit timing parameters
TN1348 SPC58x configuring CAN and CAN-FD filters
TN1271 SPC58xB/C/G/H Low Power Modes
TN1360 SPC58xx System Integration Unit Lite 2 pin multiplexing and port configuration
TN1356 SPC58xx Voltage monitor configuration
TN1339 SPC58xx temperature sensor
TN1367 SPC5x CAN errors management and bus off recovery
TN1319 Self-test configuration for SPC58xEx and SPC58xGx devices







Alternative Descriptions

MCU 32-Bit SPC58 e200z4 RISC 4MB Flash 1.14V to 1.26V 144-Pin TQFP T/R | Avnet America
MCU, AEC-Q100, 160MHZ, 32-BIT, TQFP-144 | element14


Frequently Asked Questions

Where can I find additional details, specifications and documents for a SPC58EG80E5FEC0X?

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What category does SPC58EG80E5FEC0X fall under?

The SPC58EG80E5FEC0X is listed under Automotive Microcontrollers > SPC5 32-bit Automotive MCUs > SPC5 General Purpose MCUs > SPC58 G Line MCUs.

Can I view similar or alternative parts?

You can view similar parts to SPC58EG80E5FEC0X when available in the SPC58 G Line MCUs range under the specifications section at the bottom of the details page.

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Is the SPC58EG80E5FEC0X RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by STMicroelectronics.

Which authorised distributors for SPC58EG80E5FEC0X have stock available?

Authorised distributors including Avnet America, element14, EBV Elektronik and Avnet Silica have stock available or on a lead time for SPC58EG80E5FEC0X.

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