SST49LF080A-33-4C-WHE More Semiconductors - ICs by Microchip Technology

3.0V to 3.6V 8Mbit Firmware Flash

Status: Active
Series: SST49LF080A
RoHS: Compliant
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The SST49LF080A flash memory device is designed to interface with the LPC bus for PC and Internet Appliance application in compliance with Intel Low Pin Count (LPC) Interface Specification 1.0. Two interface modes are supported: LPC mode for in-system operations and Parallel Programming (PP) mode to interface with programming equipment. The SST49LF080A flash memory device is manufactured with SST's proprietary, high-performance SuperFlash Technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches.

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Features

LPC Interface Flash – SST49LF080A: 1024K x8 (8 Mbit)
Conforms to Intel LPC Interface Specification 1.0
Flexible Erase Capability – Uniform 4 KByte Sectors – Uniform 64 KByte overlay blocks – 64 KByte Top Boot Block protection – Chip-Erase for PP Mode Only
Single 3.0-3.6V Read and Write Operations
Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention
Low Power Consumption – Active Read Current: 6 mA (typical) – Standby Current: 10 µA (typical)
Fast Sector-Erase/Byte-Program Operation – Sector-Erase Time: 18 ms (typical) – Block-Erase Time: 18 ms (typical) – Chip-Erase Time: 70 ms (typical) – Byte-Program Time: 14 µs (typical) – Chip Rewrite Time: 16 seconds (typical) – Single-pulse Program or Erase – Internal timing generation
Two Operational Modes – Low Pin Count (LPC) Interface mode for in-system operation – Parallel Programming (PP) Mode for fast production programming
LPC Interface Mode – 5-signal communication interface supporting byte Read and Write – 33 MHz clock frequency operation – WP# and TBL# pins provide hardware write protect for entire chip and/or top boot block – Standard SDP Command Set – Data# Polling and Toggle Bit for End-of-Write detection – 5 GPI pins for system design flexibility – 4 ID pins for multi-chip selection
Parallel Programming (PP) Mode – 11-pin multiplexed address and 8-pin data I/O interface – Supports fast programming In-System on programmer equipment
CMOS and PCI I/O Compatibility
Packages Available– 32-lead PLCC
All non-Pb (lead-free) devices are RoHS compliant

Specifications

Density (Organization) 8 Mbit
Operating Voltage Min. (V) 3
Oper Voltage Max (V) 3.6
Max. Clock Freq. 33 MHz
Page Size (bytes) 0
Write Protected False
Endurance 100,000
Data Retention (Years) 0
Battery Backup False
Pins | Packaging 32 | TSOP
Temp Range 0C to +70C
Packing Media Tray (208)

Last 6 months Inventory & Pricing History


Environmental Information

JEDEC Indicator e3
ROHS Compliant
China EFUP Compliant
Device Weight (g) 0.2497
Shipping Weight (kg) 1.442308
Lead Count 32
Package Type TSOP
Package Width or Size 8x14mm
Soldering Composition Matte Tin

Alternative Descriptions

MEMORY, FLASH, 8M, SERIAL, 32TSOP | Farnell


Frequently Asked Questions

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Is the SST49LF080A-33-4C-WHE RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by Microchip Technology.

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