| Status: | Active |
|---|---|
| Series: | STM32H747XI |
| RoHS: | Compliant |
Prices starting from US$11.73
| Distributor | Stock | ||
|---|---|---|---|
|
Schukat Electronic
from US$12.75
|
519
in stock
|
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|
Newark Electronics
from US$14.85
|
240
in stock
|
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|
element14
from US$17.25
|
240
in stock
|
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|
Farnell
from US$16.49
|
240
in stock
|
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|
Avnet Silica
-
|
357
in stock
|
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|
Future Electronics
from US$11.74
|
0
in stock
|
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|
Avnet America
from US$11.73
|
0
in stock
|
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|
EBV Elektronik
-
|
0
in stock
|
Buy Now |
| Buy Now |
| Dual core 32-bit Arm® Cortex®-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency up to 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions 32-bit Arm® 32-bit Cortex®-M4 core with FPU, Adaptive real-time accelerator (ART Accelerator™) for internal Flash memory and external memories, frequency up to 240 MHz, MPU, 300 DMIPS/1.25 DMIPS /MHz (Dhrystone 2.1), and DSP instructions |
| 32-bit Arm® Cortex®-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency up to 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions |
| 32-bit Arm® 32-bit Cortex®-M4 core with FPU, Adaptive real-time accelerator (ART Accelerator™) for internal Flash memory and external memories, frequency up to 240 MHz, MPU, 300 DMIPS/1.25 DMIPS /MHz (Dhrystone 2.1), and DSP instructions |
| Memories Up to 2 Mbytes of Flash memory with read-while-write support 1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), 864 Kbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain Dual mode Quad-SPI memory interface running up to 133 MHz Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash memory clocked up to 125 MHz in Synchronous mode CRC calculation unit |
| Up to 2 Mbytes of Flash memory with read-while-write support |
| 1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), 864 Kbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain |
| Dual mode Quad-SPI memory interface running up to 133 MHz |
| Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash memory clocked up to 125 MHz in Synchronous mode |
| CRC calculation unit |
| Security ROP, PC-ROP, active tamper |
| ROP, PC-ROP, active tamper |
| General-purpose input/outputs Up to 168 I/O ports with interrupt capability |
| Up to 168 I/O ports with interrupt capability |
| Reset and power management 3 separate power domains which can be independently clock-gated or switched off:D1: high-performance capabilitiesD2: communication peripherals and timersD3: reset/clock control/power management 1.62 to 3.6 V application supply and I/Os POR, PDR, PVD and BOR Dedicated USB power embedding a 3.3 V internal regulator to supply the internal PHYs Embedded regulator (LDO) to supply the digital circuitry High power-efficiency SMPS step-down converter regulator to directly supply VCORE and/or external circuitry Voltage scaling in Run and Stop mode (6 configurable ranges) Backup regulator (~0.9 V) Voltage reference for analog peripheral/VREF+ 1.2 to 3.6 V VBAT supply Low-power modes: Sleep, Stop, Standby and VBAT supporting battery charging |
| 3 separate power domains which can be independently clock-gated or switched off:D1: high-performance capabilitiesD2: communication peripherals and timersD3: reset/clock control/power management |
| D1: high-performance capabilities |
| D2: communication peripherals and timers |
| D3: reset/clock control/power management |
| 1.62 to 3.6 V application supply and I/Os |
| POR, PDR, PVD and BOR |
| Dedicated USB power embedding a 3.3 V internal regulator to supply the internal PHYs |
| Embedded regulator (LDO) to supply the digital circuitry |
| High power-efficiency SMPS step-down converter regulator to directly supply VCORE and/or external circuitry |
| Voltage scaling in Run and Stop mode (6 configurable ranges) |
| Backup regulator (~0.9 V) |
| Voltage reference for analog peripheral/VREF+ |
| 1.2 to 3.6 V VBAT supply |
| Low-power modes: Sleep, Stop, Standby and VBAT supporting battery charging |
| Low-power consumption VBAT battery operating mode with charging capability CPU and domain power state monitoring pins 2.95 μA in Standby mode (Backup SRAM OFF, RTC/LSE ON) |
| VBAT battery operating mode with charging capability |
| CPU and domain power state monitoring pins |
| 2.95 μA in Standby mode (Backup SRAM OFF, RTC/LSE ON) |
| Clock management Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI External oscillators: 4-48 MHz HSE, 32.768 kHz LSE 3× PLLs (1 for the system clock, 2 for kernel clocks) with Fractional mode |
| Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI |
| External oscillators: 4-48 MHz HSE, 32.768 kHz LSE |
| 3× PLLs (1 for the system clock, 2 for kernel clocks) with Fractional mode |
| Interconnect matrix |
| 4 DMA controllers to unload the CPU 1× high-speed master direct memory access controller (MDMA) with linked list support 2× dual-port DMAs with FIFO 1× basic DMA with request router capabilities |
| 1× high-speed master direct memory access controller (MDMA) with linked list support |
| 2× dual-port DMAs with FIFO |
| 1× basic DMA with request router capabilities |
| Up to 35 communication peripherals 4× I2Cs FM+ interfaces (SMBus/PMBus) 4× USARTs/4x UARTs (ISO7816 interface, LIN, IrDA, up to 12.5 Mbit/s) and 1x LPUART 6× SPIs, 3 with muxed duplex I2S audio class accuracy via internal audio PLL or external clock, 1x I2S in LP domain (up to 150 MHz) 4x SAIs (serial audio interface) SPDIFRX interface SWPMI single-wire protocol master I/F MDIO Slave interface 2× SD/SDIO/MMC interfaces (up to 125 MHz) 2× CAN controllers: 2 with CAN FD, 1 with time-triggered CAN (TT-CAN) 2× USB OTG interfaces (1FS, 1HS/FS) crystal-less solution with LPM and BCD Ethernet MAC interface with DMA controller HDMI-CEC 8- to 14-bit camera interface (up to 80 MHz) |
| 4× I2Cs FM+ interfaces (SMBus/PMBus) |
| 4× USARTs/4x UARTs (ISO7816 interface, LIN, IrDA, up to 12.5 Mbit/s) and 1x LPUART |
| 6× SPIs, 3 with muxed duplex I2S audio class accuracy via internal audio PLL or external clock, 1x I2S in LP domain (up to 150 MHz) |
| 4x SAIs (serial audio interface) |
| SPDIFRX interface |
| SWPMI single-wire protocol master I/F |
| MDIO Slave interface |
| 2× SD/SDIO/MMC interfaces (up to 125 MHz) |
| 2× CAN controllers: 2 with CAN FD, 1 with time-triggered CAN (TT-CAN) |
| 2× USB OTG interfaces (1FS, 1HS/FS) crystal-less solution with LPM and BCD |
| Ethernet MAC interface with DMA controller |
| HDMI-CEC |
| 8- to 14-bit camera interface (up to 80 MHz) |
| 11 analog peripherals 3× ADCs with 16-bit max. resolution (up to 36 channels, up to 3.6 MSPS) 1× temperature sensor 2× 12-bit D/A converters (1 MHz) 2× ultra-low-power comparators 2× operational amplifiers (7.3 MHz bandwidth) 1× digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters |
| 3× ADCs with 16-bit max. resolution (up to 36 channels, up to 3.6 MSPS) |
| 1× temperature sensor |
| 2× 12-bit D/A converters (1 MHz) |
| 2× ultra-low-power comparators |
| 2× operational amplifiers (7.3 MHz bandwidth) |
| 1× digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters |
| Graphics LCD-TFT controller up to XGA resolution MIPI DSI host including an MIPI D-PHY to interface with low-pin count large displays Chrom-ART graphical hardware Acceleratorâ„¢ (DMA2D) to reduce CPU load Hardware JPEG Codec |
| LCD-TFT controller up to XGA resolution |
| MIPI DSI host including an MIPI D-PHY to interface with low-pin count large displays |
| Chrom-ART graphical hardware Acceleratorâ„¢ (DMA2D) to reduce CPU load |
| Hardware JPEG Codec |
| Up to 22 timers and watchdogs 1× high-resolution timer (2.1 ns max resolution) 2× 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input (up to 240 MHz) 2× 16-bit advanced motor control timers (up to 240 MHz) 10× 16-bit general-purpose timers (up to 240 MHz) 5× 16-bit low-power timers (up to 240 MHz) 4× watchdogs (independent and window) 2× SysTick timers RTC with sub-second accuracy and hardware calendar |
| 1× high-resolution timer (2.1 ns max resolution) |
| 2× 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input (up to 240 MHz) |
| 2× 16-bit advanced motor control timers (up to 240 MHz) |
| 10× 16-bit general-purpose timers (up to 240 MHz) |
| 5× 16-bit low-power timers (up to 240 MHz) |
| 4× watchdogs (independent and window) |
| 2× SysTick timers |
| RTC with sub-second accuracy and hardware calendar |
| Debug mode SWD & JTAG interfaces 4-Kbyte Embedded Trace Buffer |
| SWD & JTAG interfaces |
| 4-Kbyte Embedded Trace Buffer |
| True random number generators (3 oscillators each) |
| 96-bit unique ID |
Product Specifications |
|---|
| DS12930 Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI |
Reference Manuals |
|---|
| RM0399 STM32H745/755 and STM32H747/757 advanced Arm®-based 32-bit MCUs |
Programming Manuals |
|---|
| PM0214 STM32 Cortex®-M4 MCUs and MPUs programming manual |
| PM0253 STM32F7 Series and STM32H7 Series Cortex®-M7 processor programming manual |
Design Notes & Tips |
|---|
| DT0117 MIcrophone array beamforming in the PCM and PDM domain |
Flyers |
|---|
| Get ready for the largest IoT development ecosystem |
| STM32 Nucleo boards - Unified scalable offering |
| STM32Trust An ecosystem for embedded security |
Brochures |
|---|
| STM32H7 series Powered by Arm® Cortex®-M7 |
| STM32H730, STM32H750 & STM32H7B0 High-performance value lines |
| MC 32 bit 1.62V 2048KB Fl TFBGA 240+25 | Schukat Electronic |
| Mcu, 32Bit, 480Mhz, Tfbga-265 Rohs Compliant: Yes |Stmicroelectronics STM32H747XIH6 | Newark Electronics |
| MCU, 32BIT, 480MHZ, TFBGA-265 | element14 |
| ARM MCU, STM32 Family STM32H7 Series Microcontrollers, ARM Cortex-M7F, 32 bit, 480 MHz, 2 MB | Avnet Silica |
| STM32 Series 2 MB Flash 1 MB RAM 480 MHz 32-Bit Microcontroller - TFBGA-265 | Future Electronics |
Where can I find additional details, specifications and documents for a STM32H747XIH6?
Additional datasheets, footprints and schematics for STM32H747XIH6 are listed on our Part Details page. You can also find images and similar parts to STM32H747XIH6 on this page.
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What category does STM32H747XIH6 fall under?
The STM32H747XIH6 is listed under Microcontrollers & Microprocessors > STM32 32-bit Arm Cortex MCUs > STM32 High Performance MCUs > STM32H7 Series > STM32H747/757.
Can I view similar or alternative parts?
You can view similar parts to STM32H747XIH6 when available in the STM32H747/757 range under the specifications section at the bottom of the details page.
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Is the STM32H747XIH6 RoHS compliant?
Yes. This part has been flagged as RoHS Compliant by STMicroelectronics.
Which authorised distributors for STM32H747XIH6 have stock available?
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