SY100EL34LZG Clock,Timing & Frequency Management by Microchip Technology

Status: Active
Series: SY100EL34
RoHS: Compliant
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The SY10/100EL34/L are low skew ÷2, ÷4, ÷8 clock generation chips designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. In addition, by using the VBB output, a sinusoidal source can be ACcoupled into the device. If a single-ended input is to be used, the VBB output should be connected to the CLK input and bypassed to ground via a 0.01µF capacitor.

The VBB output is designed to act as the switching reference for the input of the EL34/L under single-ended input conditions. As a result, this pin can only source/ sink up to 0.5mA of current.The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider stages. The internal enable flip-flop is clocked on the falling edge of the divider stages. The internal enable flip-flop is clocked on the falling edge of the input clock, therefore, all associated specification limits are referenced to the negative edge of the clock input.Upon start-up, the internal flip-flops will attain a random state; the master reset (MR) input allows for the synchronization of the internal dividers, as well as for multiple EL34/Ls in a system.

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Features

3.3V and 5V power supply options
50ps output-to-output skew
Synchronous enable/disable
Master Reset for synchronization
Internal 75KO input pull-down resistors
Available in 16-pin SOIC package

Specifications

Product Type Divider
Description ÷2, ÷4, ÷8 clock generation
Input ECL/PECL
Supply Voltage 5
Max Freq (GHz) 0
Max Data (Gbps) 0
Max Prop Delay (ps) 1200
Icc (mA) 0
Power Supply 0
Max Within Device Skew (ps) 50
OE False
RPE False
FSI False
Input Mux False
Input EQ False
Delay Resolution ps/step 0
Output Type ECL/PECL
Number Of Outputs 0
Pins | Packaging 16 | SOIC
Temp Range -40C to +85C
Packing Media Tube (48)

Last 6 months Inventory & Pricing History


Environmental Information

JEDEC Indicator e3
ROHS Compliant
China EFUP Compliant
Device Weight (g) 0.1574
Shipping Weight (kg) 0.3
Lead Count 16
Package Type SOIC
Package Width or Size .150in
Soldering Composition Matte Tin

Alternative Descriptions

3.3V /2, /4. /8 Clock Generation Chip | Microchip Technology
Clock Generator, Nsoic-16 | Newark Electronics
CLOCK GENERATOR, NSOIC-16 | element14


Frequently Asked Questions

Where can I find additional details, specifications and documents for a SY100EL34LZG?

Additional datasheets, footprints and schematics for SY100EL34LZG are listed on our Part Details page. You can also find images and similar parts to SY100EL34LZG on this page.

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What category does SY100EL34LZG fall under?

The SY100EL34LZG is listed under Semiconductors - ICs > Clock,Timing & Frequency Management > Clock Synthesizers & Generators.

Can I view similar or alternative parts?

You can view similar parts to SY100EL34LZG when available in the Clock Synthesizers & Generators range under the specifications section at the bottom of the details page.

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Is the SY100EL34LZG RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by Microchip Technology.

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Authorised distributors including Microchip Technology, Newark Electronics, element14 and Farnell have stock available or on a lead time for SY100EL34LZG.

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