SY89872UMG More Semiconductors - ICs by Microchip Technology

Status: Active
Series: SY89872U
RoHS: Compliant
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This 2.5V low-skew, low-jitter, precision LVDS output clock divider accepts any high-speed differential clock input (AC or DC-coupled) CML, LVPECL, HSTL or LVDS and divides down the frequency using a programmable divider ratio to create a frequency-locked, lower speed version of the input clock. The SY89872U includes two output banks. Bank A is an exact copy of the input clock (pass through) with matched propagation delay to Bank B, the divided output bank.Available divider ratios are 2, 4, 8 and 16. In a typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz or 38MHz auxiliary clock components.

The differential input buffer has a unique internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards. A VREF- AC reference is included for AC-coupled applications.The SY89872U is part of Micrel's high-speed Precision Edge® timing and distribution family. For 3.3V applications, consider the SY89873L. For applications that require an LVPECL output, consider the SY89872U.The /RESET input asynchronously resets the divider outputs (Bank B). In the pass-through function (Bank A) the /RESET synchronously enables or disables the outputs on the next falling edge of IN (rising edge of /IN). Refer to the "Timing Diagram."

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Features

>2GHz fMAX
<750ps tPD (matched delay between banks)
<15ps within-device skew
<200ps rise/fall time
265 RMS phase jitter
Unique input termination and VTpin for DC-coupled and AC-coupled inputs: any differential inputs (LVPECL, LVDS, CML, HSTL)
Precision differential LVDS outputs
Matched delay: all outputs have matched delay, independent of divider setting
TTL/CMOS inputs for select and reset/disable
Bank A: Buffered copy of input clock (undivided)
Bank B: Divided output (÷2, ÷4, ÷8, ÷16), two copies
2.5V power supply
Wide operating temperature range: -40°C to +85°C
Available in 16-pin (3mm x 3mm) QFN package

Specifications

Product Type Divider
Description 2 Banks (÷1, ÷2, ÷4, ÷8, ÷16); 2 Outputs
Input ANY
Output LVDS
Supply Voltage 2.5V
Max Freq (GHz) 2
Max Data (Gbps) 0
Max Prop Delay (ps) 750
Icc (mA) 75
Power Supply 0
Max Within Device Skew (ps) 15
OE True
RPE False
FSI False
Input Mux False
Input EQ False
Delay Resolution ps/step 0
Output Type LVDS
Number Of Outputs 0
Pins | Packaging 16 | VQFN
Temp Range -40C to +85C
Packing Media Tube (100)

Last 6 months Inventory & Pricing History


Environmental Information

JEDEC Indicator e4
ROHS Compliant
China EFUP Compliant
Device Weight (g) 0.0213
Shipping Weight (kg) 0.05
Lead Count 16
Package Type VQFN
Package Width or Size 3x3x1.00mm
Soldering Composition NiPdAu

Alternative Descriptions

2.5V LVDS Output Clock Divider/Fanout | Microchip Technology
Ic, Lvds Clk Divider/Fanout, 16Mlf | Newark Electronics
SY89872U - 2GHz ANY Diff. IN-to-LVDS Programmable Clock Divider/Fanout Buffer | Future Electronics
IC, LVDS CLK DIVIDER / FANOUT, 16MLF | element14


Frequently Asked Questions

Where can I find additional details, specifications and documents for a SY89872UMG?

Additional datasheets, footprints and schematics for SY89872UMG are listed on our Part Details page. You can also find images and similar parts to SY89872UMG on this page.

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What category does SY89872UMG fall under?

The SY89872UMG is listed under Semiconductors - ICs > More Semiconductors - ICs.

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Is the SY89872UMG RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by Microchip Technology.

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Authorised distributors including Microchip Technology, Newark Electronics, Future Electronics, element14 and Farnell have stock available or on a lead time for SY89872UMG.

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